During the process of mask write or direct write, several factors contribute to induce errors and prevent the achievement of the expected resolution. Some of these factors are the electron scattering (forward and backward), resist diffusion, resist thickness, etching, flare, fogging, metrology, etc. In order to improve the resolution and reduce the impact of these phenomena, there are several strategies of proximity effect correction (PEC), fogging effect correction (FEC), etching compensation, among others. The strategies are based on a prediction of the impact of each effect of a correction of these by means of dose and/or geometry compensation. Therefore, the quality of the correction depends upon the quality of the models used to predict the phenomena, said models being different from one manufacturing process to another. High precision of the model and the corrections can certainly be obtained, but at a high computation cost.
A problem is that, in any production flow, it is necessary to change the process from time to time. This may come from the purchase of new equipment, new resists, etc. In many cases maintaining identical behavior from the previous flow is desirable. In the prior art, this is achieved by tuning the process conditions. The physical process parameters (etch bias, power, resist thickness, bake, etc. . . . ) are changed which is time consuming and quite costly.
Solutions for alleviating this burden have been found in the context of optical proximity effect correction (OPC). Some of these solutions are disclosed by U.S. Pat. Nos. 6,033,814 and 6,463,403. The basic idea of these methods of the prior art is to calibrate the two distinct models, one for the original process and the second for the new process, the output of which have to be matched to those of the original process. Once the two calibrations have been performed, it is necessary to alter the target of the original process into those of the new process using the two calibrated models. Several calculation procedures (two calibrations, two simulations and one correction) have to be run, which is still quite burdensome and computation heavy.
The assignee of the present application has already improved over this prior art by inventing a method to determine the parameters of an IC manufacturing process. According to this invention which is disclosed in PCT/EP2015/062334, by a sizing correction table is applied to the geometry of target design, the parameters of the sizing correction table being determined as a function of the differences in the metrology results between the target process and a reference process.
This method alleviates the burden and the computing workload by implementing a single differential model, which allows a process to mimic the other (or vice-versa since the matching can work in both directions), therefore reducing the calibration and correction effort. Moreover, using the process matching method gives more flexibility to achieve a desired result by allowing to impose constraints to the matching process, for instance to retain a matching result, when the measurements points which are used are not well scattered across the whole design, or to perform one of an interpolation and an extrapolation between measurements, or to impose a linearity on a parameter.
But the sizing can only be applied within certain limits, i.e. it is not possible to apply a sizing beyond a limit because the process window decreases with the edge displacement.
To overcome these limitations, according to the invention, a dose correction is determined to be applied, at least partly, in lieu of the geometry correction to maintain an adequate level of process window.